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Modeling semiconductor manufacturing processes under data fragmentation
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Description
Modeling semiconductor manufacturing processes under data fragmentation
Speaker: Valeria Borodin (Mines Saint-Étienne, France)
Chair: Jean-Michel Poggi (Univ. Paris-Saclay)
Date: 4th October 2023, at 12:30-13:30 CEST
Given their complexity, semiconductor manufacturing processes are highly fragmented. Hundreds of different products are processed by complex machines (generally including cassette, process, and transfer modules) under different settings. Modeling semiconductor manufacturing processes for each of the possible processing paths (i.e., combinations of modules, machine settings, machines, context settings, etc.) becomes intractable. The value induced by a microscopic representation of machines has been explicitly shown within the framework of various classes of problems, ranging from advanced process control (e.g., virtual metrology) to operations management (e.g., scheduling, time constraint management). This talk refers to the issue of data fragmentation, highly pronounced in semiconductor manufacturing, and focuses on modeling the variability of processing times of machines with different granularities and within several contexts (regression, real-time/operational management of operations).
This work has been conducted in collaboration with minds.ai (https://minds.ai/).
Bio:
Valeria Borodin is Associate Professor at Mines Saint-Étienne. She holds a Ph.D. degree in Optimization and Systems Safety from the University of Technology of Troyes, France. Her research interests refer to the management of quantitative operations within manufacturing and logistics systems, including modeling, optimization, and data analytics. She is particularly keen on leveraging the predictive opportunities/potential from data to augment the contextual awareness of decision-making processes within operations research-oriented applications.
